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d51b995528
I fixed the AHCI bug, with a patch that I wrote. It works by restoring the old SeaBIOS AHCI initialisation behaviour, whereby the AHCI controller is enabled from its current state; the patch that broke AHCI in coreboot (tested on ThinkPad T420), changed AHCI initialisation behaviour so that the controller's state is first reset, prior to enablement. However, my patch also retains the new AHCI initialisation behaviour, when a CSM is in use. The AHCI reset patch was done, by the author, specifically for SeaBIOS in CSM mode, so it makes sense to only change the behaviour conditionally according to that. This reverts commit 8245f0b3211812ac818adadd6526b0b39c63f3f0. Signed-off-by: Leah Rowe <leah@libreboot.org>
63 lines
2.1 KiB
Diff
63 lines
2.1 KiB
Diff
From 5fe2215bc5196d836b54e1e5fb00b63fa096fda7 Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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Date: Thu, 1 May 2025 15:46:54 +0100
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Subject: [PATCH 4/4] ahci: Only reset controller on CSM
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Please refer to this commit:
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commit 8863cbbd15a73b03153553c562f5b1fb939ad4d7
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Author: Gerd Hoffmann <kraxel@redhat.com>
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Date: Thu Feb 6 12:10:21 2025 +0100
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ahci: add controller reset
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This commit broke AHCI init on the Lenovo ThinkPad T420,
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when tested with SeaBIOS as a coreboot payload.
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Since the above commit was made with CSMs in mind, to make
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the AHCI driver work there, that change has been re-worked
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so as to only apply when a CSM is in use.
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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---
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src/hw/ahci.c | 17 ++++++++++++++---
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1 file changed, 14 insertions(+), 3 deletions(-)
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diff --git a/src/hw/ahci.c b/src/hw/ahci.c
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index 2285d33d..b09b198a 100644
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--- a/src/hw/ahci.c
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+++ b/src/hw/ahci.c
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@@ -637,7 +637,7 @@ static void
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ahci_controller_setup(struct pci_device *pci)
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{
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struct ahci_port_s *port;
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- u32 pnr, max;
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+ u32 val, pnr, max;
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if (create_bounce_buf() < 0)
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return;
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@@ -660,8 +660,19 @@ ahci_controller_setup(struct pci_device *pci)
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pci_enable_busmaster(pci);
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- ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
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- ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
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+ /* AHCI controller reset, but only for CSM. Commit 8863cbbd
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+ introduced this universally, to make AHCI drivers work in
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+ CSM mode, but it broke AHCI setup on the ThinkPad T420 when
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+ SeaBIOS is used as a coreboot payload, hence the else clause: */
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+ if (CONFIG_CSM) {
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+ /* Enable AHCI controller after resetting its state */
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+ ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_RESET);
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+ ahci_ctrl_writel(ctrl, HOST_CTL, HOST_CTL_AHCI_EN);
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+ } else {
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+ /* Enable AHCI controller from its current state */
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+ val = ahci_ctrl_readl(ctrl, HOST_CTL);
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+ ahci_ctrl_writel(ctrl, HOST_CTL, val | HOST_CTL_AHCI_EN);
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+ }
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ctrl->caps = ahci_ctrl_readl(ctrl, HOST_CAP);
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ctrl->ports = ahci_ctrl_readl(ctrl, HOST_PORTS_IMPL);
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--
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2.39.5
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