cbmk/config/coreboot/next/patches/0005-src-intel-x4x-Disable-stack-overflow-debug.patch
Leah Rowe ec7e8d3a8f Bump coreboot/next to 2f1e4e5e85, 31 December 2024
This revision:
* 2f1e4e5e85 mb/hp/snb_ivb_desktops/z220*: Remove leftover old usb configurations

This is in line with the revision used by Libreboot 20241206,
8th revision - as of this commit, Canoeboot 20241207 rev1 can
be compiled, I just need to update the GRUB/SeaBIOS/U-Boot
version reporting, and sync up lbwww->cbwww with a release page.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-01-07 00:58:17 +00:00

33 lines
966 B
Diff

From ffd9d2685e47923f4b073664c16fd187e071c234 Mon Sep 17 00:00:00 2001
From: Leah Rowe <leah@libreboot.org>
Date: Mon, 6 Jan 2025 01:53:53 +0000
Subject: [PATCH 5/9] src/intel/x4x: Disable stack overflow debug
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/northbridge/intel/x4x/Kconfig | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index 097e11126c..7e4e14cf94 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -28,6 +28,15 @@ config ECAM_MMCONF_BUS_NUMBER
int
default 256
+# Override DEBUG Kconfig to avoid false alarm about stack overflow.
+config DEBUG_STACK_OVERFLOW_BREAKPOINTS
+ bool
+ default n
+
+config DEBUG_STACK_OVERFLOW_BREAKPOINTS_IN_ALL_STAGES
+ bool
+ default n
+
# This number must be equal or lower than what's reported in ACPI PCI _CRS
config DOMAIN_RESOURCE_32BIT_LIMIT
default 0xfec00000
--
2.39.5