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https://codeberg.org/canoeboot/cbmk.git
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57a63343fb
With other recent changes, and this patch, Canoeboot is now in sync with Libreboot lbmk, commit: cd9685d12d2b71a00cb6766bb85f392d4db92c83 This is with updated deblobbing, and Canoeboot's no-microcode patches, that disable microcode updates universally. Several patches from lbmk (for coreboot) aren't needed, due to being for boards that Canoeboot does not use, so those patches have been somewhat rebased, and configs adapted, but this is otherwise identical. As in previous Canoeboot updates, I've turned off this option in all coreboot configs: CONFIG_USE_BLOBS Turning off that option prevents the coreboot build system from ever attempting to use any blobs, but in practise it would not have done so anyway, because Canoeboot disables all handling of microcode in the build system. Signed-off-by: Leah Rowe <info@minifree.org>
120 lines
5 KiB
Diff
120 lines
5 KiB
Diff
From e570de21e2463cfca9b2ab25ae67efd65f8e3315 Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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Date: Thu, 12 Oct 2023 01:20:23 +0100
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Subject: [PATCH 9/9] never enable cpu microcode, even if told to
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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---
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src/cpu/Makefile.mk | 55 -----------------------------------
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src/cpu/intel/fit/Makefile.mk | 31 --------------------
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2 files changed, 86 deletions(-)
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diff --git a/src/cpu/Makefile.mk b/src/cpu/Makefile.mk
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index b1c1b1bb3e..571cd1d0e5 100644
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--- a/src/cpu/Makefile.mk
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+++ b/src/cpu/Makefile.mk
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@@ -11,61 +11,6 @@ subdirs-$(CONFIG_ARCH_X86) += x86
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subdirs-$(CONFIG_CPU_QEMU_X86) += qemu-x86
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subdirs-$(CONFIG_CPU_POWER9) += power9
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-$(eval $(call create_class_compiler,cpu_microcode,x86_32))
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-################################################################################
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-## Rules for building the microcode blob in CBFS
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-################################################################################
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-
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-cbfs-files-$(CONFIG_USE_CPU_MICROCODE_CBFS_BINS) += cpu_microcode_blob.bin
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-
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-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y)
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-cbfs-files-y += cpu_microcode_blob.bin
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-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin
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-
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-$(objgenerated)/microcode.bin: $(call strip_quotes,$(CONFIG_CPU_MICROCODE_HEADER_FILES))
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- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\""
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- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES)
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-endif
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-
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-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS),y)
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-$(obj)/cpu_microcode_blob.bin: cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES))
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-endif
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-# otherwise `cpu_microcode_bins` should be filled by platform makefiles
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-
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-# We just mash all microcode binaries together into one binary to rule them all.
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-# This approach assumes that the microcode binaries are properly padded, and
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-# their headers specify the correct size. This works fairly well on isolatied
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-# updates, such as Intel and some AMD microcode, but won't work very well if the
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-# updates are wrapped in a container, like AMD's microcode update container. If
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-# there is only one microcode binary (i.e. one container), then we don't have
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-# this issue, and this rule will continue to work.
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-$(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins)) $(DOTCONFIG)
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- for bin in $(cpu_microcode_bins); do \
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- if [ ! -f "$$bin" ]; then \
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- echo "Microcode error: $$bin does not exist"; \
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- NO_MICROCODE_FILE=1; \
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- fi; \
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- done; \
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- if [ -n "$$NO_MICROCODE_FILE" ]; then \
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- if [ -z "$(CONFIG_USE_BLOBS)" ] && [ -n "$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS)" ]; then \
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- echo "Try enabling binary-only repository in Kconfig 'General setup' menu."; \
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- fi; \
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- false; \
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- fi
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- $(if $(cpu_microcode_bins),,false) # fail if no file is given at all
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- @printf " MICROCODE $(subst $(obj)/,,$(@))\n"
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- @echo $(cpu_microcode_bins)
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- cat $(cpu_microcode_bins) > $@
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-
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-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
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-cpu_microcode_blob.bin-type := microcode
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-# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
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-ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
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-cpu_microcode_blob.bin-align := 64
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-else
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-cpu_microcode_blob.bin-align := 16
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-endif
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-
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ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
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cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
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endif
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diff --git a/src/cpu/intel/fit/Makefile.mk b/src/cpu/intel/fit/Makefile.mk
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index a86a22e6d6..edca120c14 100644
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--- a/src/cpu/intel/fit/Makefile.mk
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+++ b/src/cpu/intel/fit/Makefile.mk
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@@ -19,35 +19,4 @@ $(call add_intermediate, set_fit_ptr, $(IFITTOOL))
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FIT_ENTRY=$(call strip_quotes, $(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG))
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-ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock
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-
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-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE)$(CONFIG_CPU_INTEL_MICROCODE_CBFS_SPLIT_BINS),y)
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-
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-$(call add_intermediate, add_mcu_fit, set_fit_ptr $(IFITTOOL))
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- @printf " UPDATE-FIT Microcode\n"
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- $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT
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-
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-# Second FIT in TOP_SWAP bootblock
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-ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
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-
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-$(call add_intermediate, set_ts_fit_ptr, $(IFITTOOL))
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- @printf " UPDATE-FIT Top Swap: set FIT pointer to table\n"
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- $(IFITTOOL) -f $< -F -n intel_fit_ts -r COREBOOT $(TS_OPTIONS)
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-
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-$(call add_intermediate, add_ts_mcu_fit, set_ts_fit_ptr $(IFITTOOL))
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- @printf " UPDATE-FIT Top Swap: Microcode\n"
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-ifneq ($(FIT_ENTRY),)
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- $(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
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-endif # FIT_ENTRY
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- $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
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-
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-cbfs-files-y += intel_fit_ts
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-intel_fit_ts-file := fit_table.c:struct
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-intel_fit_ts-type := intel_fit
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-intel_fit_ts-align := 16
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-
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-endif # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK
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-
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-endif # CONFIG_CPU_MICROCODE_CBFS_NONE
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-
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endif # CONFIG_UPDATE_IMAGE
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--
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2.39.2
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