cbmk/config/coreboot/i945/patches/0010-never-add-microcode-updates-even-if-told-to.patch
Leah Rowe 57a63343fb Update coreboot to LB 20240504 (sync lbmk cd9685d1)
With other recent changes, and this patch, Canoeboot is now
in sync with Libreboot lbmk, commit:
cd9685d12d2b71a00cb6766bb85f392d4db92c83

This is with updated deblobbing, and Canoeboot's no-microcode
patches, that disable microcode updates universally.

Several patches from lbmk (for coreboot) aren't needed,
due to being for boards that Canoeboot does not use, so
those patches have been somewhat rebased, and configs
adapted, but this is otherwise identical.

As in previous Canoeboot updates, I've turned off this
option in all coreboot configs:
CONFIG_USE_BLOBS

Turning off that option prevents the coreboot build system
from ever attempting to use any blobs, but in practise it
would not have done so anyway, because Canoeboot disables
all handling of microcode in the build system.

Signed-off-by: Leah Rowe <info@minifree.org>
2024-05-03 05:59:00 +01:00

122 lines
5 KiB
Diff

From fd7e1a29eb14d4387adfaac63034ed144eb103d7 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Fri, 3 May 2024 05:33:41 +0100
Subject: [PATCH 10/10] never add microcode updates, even if told to
because gnu free system distribution guidelines
Signed-off-by: Leah Rowe <info@minifree.org>
---
src/cpu/Makefile.inc | 55 ----------------------------------
src/cpu/intel/fit/Makefile.inc | 31 -------------------
2 files changed, 86 deletions(-)
diff --git a/src/cpu/Makefile.inc b/src/cpu/Makefile.inc
index 12c682d43d..e5fb13b33d 100644
--- a/src/cpu/Makefile.inc
+++ b/src/cpu/Makefile.inc
@@ -9,61 +9,6 @@ subdirs-$(CONFIG_ARCH_X86) += x86
subdirs-$(CONFIG_CPU_QEMU_X86) += qemu-x86
subdirs-$(CONFIG_CPU_POWER9) += power9
-$(eval $(call create_class_compiler,cpu_microcode,x86_32))
-################################################################################
-## Rules for building the microcode blob in CBFS
-################################################################################
-
-cbfs-files-$(CONFIG_USE_CPU_MICROCODE_CBFS_BINS) += cpu_microcode_blob.bin
-
-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y)
-cbfs-files-y += cpu_microcode_blob.bin
-cpu_microcode_blob.bin-file = $(objgenerated)/microcode.bin
-
-$(objgenerated)/microcode.bin: $(call strip_quotes,$(CONFIG_CPU_MICROCODE_HEADER_FILES))
- echo " util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin \"$(CONFIG_CPU_MICROCODE_HEADER_FILES)\""
- util/scripts/ucode_h_to_bin.sh $(objgenerated)/microcode.bin $(CONFIG_CPU_MICROCODE_HEADER_FILES)
-endif
-
-ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS),y)
-$(obj)/cpu_microcode_blob.bin: cpu_microcode_bins := $(call strip_quotes,$(CONFIG_CPU_UCODE_BINARIES))
-endif
-# otherwise `cpu_microcode_bins` should be filled by platform makefiles
-
-# We just mash all microcode binaries together into one binary to rule them all.
-# This approach assumes that the microcode binaries are properly padded, and
-# their headers specify the correct size. This works fairly well on isolatied
-# updates, such as Intel and some AMD microcode, but won't work very well if the
-# updates are wrapped in a container, like AMD's microcode update container. If
-# there is only one microcode binary (i.e. one container), then we don't have
-# this issue, and this rule will continue to work.
-$(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins)) $(DOTCONFIG)
- for bin in $(cpu_microcode_bins); do \
- if [ ! -f "$$bin" ]; then \
- echo "Microcode error: $$bin does not exist"; \
- NO_MICROCODE_FILE=1; \
- fi; \
- done; \
- if [ -n "$$NO_MICROCODE_FILE" ]; then \
- if [ -z "$(CONFIG_USE_BLOBS)" ] && [ -n "$(CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS)" ]; then \
- echo "Try enabling binary-only repository in Kconfig 'General setup' menu."; \
- fi; \
- false; \
- fi
- $(if $(cpu_microcode_bins),,false) # fail if no file is given at all
- @printf " MICROCODE $(subst $(obj)/,,$(@))\n"
- @echo $(cpu_microcode_bins)
- cat $(cpu_microcode_bins) > $@
-
-cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
-cpu_microcode_blob.bin-type := microcode
-# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
-ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
-cpu_microcode_blob.bin-align := 64
-else
-cpu_microcode_blob.bin-align := 16
-endif
-
ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
endif
diff --git a/src/cpu/intel/fit/Makefile.inc b/src/cpu/intel/fit/Makefile.inc
index d3f12e43e6..c31102872e 100644
--- a/src/cpu/intel/fit/Makefile.inc
+++ b/src/cpu/intel/fit/Makefile.inc
@@ -17,35 +17,4 @@ $(call add_intermediate, set_fit_ptr, $(IFITTOOL))
FIT_ENTRY=$(call strip_quotes, $(CONFIG_INTEL_TOP_SWAP_FIT_ENTRY_FMAP_REG))
-ifneq ($(CONFIG_UPDATE_IMAGE),y) # never update the bootblock
-
-ifneq ($(CONFIG_CPU_MICROCODE_CBFS_NONE),y)
-
-$(call add_intermediate, add_mcu_fit, set_fit_ptr $(IFITTOOL))
- @printf " UPDATE-FIT Microcode\n"
- $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) -r COREBOOT
-
-# Second FIT in TOP_SWAP bootblock
-ifeq ($(CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK),y)
-
-$(call add_intermediate, set_ts_fit_ptr, $(IFITTOOL))
- @printf " UPDATE-FIT Top Swap: set FIT pointer to table\n"
- $(IFITTOOL) -f $< -F -n intel_fit_ts -r COREBOOT $(TS_OPTIONS)
-
-$(call add_intermediate, add_ts_mcu_fit, set_ts_fit_ptr $(IFITTOOL))
- @printf " UPDATE-FIT Top Swap: Microcode\n"
-ifneq ($(FIT_ENTRY),)
- $(IFITTOOL) -f $< -A -n $(FIT_ENTRY) -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
-endif # FIT_ENTRY
- $(IFITTOOL) -f $< -a -n cpu_microcode_blob.bin -t 1 -s $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) $(TS_OPTIONS) -r COREBOOT
-
-cbfs-files-y += intel_fit_ts
-intel_fit_ts-file := fit_table.c:struct
-intel_fit_ts-type := intel_fit
-intel_fit_ts-align := 16
-
-endif # CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK
-
-endif # CONFIG_CPU_MICROCODE_CBFS_NONE
-
endif # CONFIG_UPDATE_IMAGE
--
2.39.2