cbmk/config/coreboot/default/patches/0002-add-c3-and-clockgen-to-apple-macbook21.patch
Leah Rowe 57a63343fb Update coreboot to LB 20240504 (sync lbmk cd9685d1)
With other recent changes, and this patch, Canoeboot is now
in sync with Libreboot lbmk, commit:
cd9685d12d2b71a00cb6766bb85f392d4db92c83

This is with updated deblobbing, and Canoeboot's no-microcode
patches, that disable microcode updates universally.

Several patches from lbmk (for coreboot) aren't needed,
due to being for boards that Canoeboot does not use, so
those patches have been somewhat rebased, and configs
adapted, but this is otherwise identical.

As in previous Canoeboot updates, I've turned off this
option in all coreboot configs:
CONFIG_USE_BLOBS

Turning off that option prevents the coreboot build system
from ever attempting to use any blobs, but in practise it
would not have done so anyway, because Canoeboot disables
all handling of microcode in the build system.

Signed-off-by: Leah Rowe <info@minifree.org>
2024-05-03 05:59:00 +01:00

68 lines
2.2 KiB
Diff

From dd21a7a6c1961d314db7fdabd6982d71930b0f1a Mon Sep 17 00:00:00 2001
From: Vitali64 <5405891-vitali64yt@users.noreply.gitlab.com>
Date: Wed, 27 Oct 2021 13:36:01 +0200
Subject: [PATCH 02/16] add c3 and clockgen to apple/macbook21
---
src/mainboard/apple/macbook21/Kconfig | 1 +
src/mainboard/apple/macbook21/cstates.c | 13 +++++++++++++
src/mainboard/apple/macbook21/devicetree.cb | 6 ++++++
3 files changed, 20 insertions(+)
diff --git a/src/mainboard/apple/macbook21/Kconfig b/src/mainboard/apple/macbook21/Kconfig
index 5f5ffde588..27377b737c 100644
--- a/src/mainboard/apple/macbook21/Kconfig
+++ b/src/mainboard/apple/macbook21/Kconfig
@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
select HAVE_ACPI_TABLES
select HAVE_ACPI_RESUME
select I945_LVDS
+ select DRIVERS_I2C_CK505
config MAINBOARD_DIR
default "apple/macbook21"
diff --git a/src/mainboard/apple/macbook21/cstates.c b/src/mainboard/apple/macbook21/cstates.c
index 13d06f0839..88b8669c61 100644
--- a/src/mainboard/apple/macbook21/cstates.c
+++ b/src/mainboard/apple/macbook21/cstates.c
@@ -29,6 +29,19 @@ static const acpi_cstate_t cst_entries[] = {
.addrh = 0,
}
},
+ {
+ .ctype = 3,
+ .latency = 17,
+ .power = 250,
+ .resource = {
+ .space_id = ACPI_ADDRESS_SPACE_FIXED,
+ .bit_width = ACPI_FFIXEDHW_VENDOR_INTEL,
+ .bit_offset = ACPI_FFIXEDHW_CLASS_MWAIT,
+ .access_size = ACPI_ACCESS_SIZE_UNDEFINED,
+ .addrl = 0x20,
+ .addrh = 0,
+ }
+ },
};
int get_cst_entries(const acpi_cstate_t **entries)
diff --git a/src/mainboard/apple/macbook21/devicetree.cb b/src/mainboard/apple/macbook21/devicetree.cb
index fd86e939b9..263fbabcd1 100644
--- a/src/mainboard/apple/macbook21/devicetree.cb
+++ b/src/mainboard/apple/macbook21/devicetree.cb
@@ -100,7 +100,13 @@ chip northbridge/intel/i945
end
device pci 1f.3 on # SMBUS
subsystemid 0x8086 0x7270
+ chip drivers/i2c/ck505
+ register "mask" = "{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }"
+ register "regs" = "{ 0x77, 0x77, 0x2d, 0x00, 0x21, 0x10, 0x3b, 0x06, 0x07, 0x0f, 0xf0, 0x01, 0x1e, 0x7f, 0x80, 0x80, 0x10, 0x08, 0x04, 0x01 }"
+ device i2c 69 on end
+ end
end
+
end
end
end
--
2.39.2