cbmk/config/flashprog/patches/0001-Workaround-for-MX25-chips.patch
Leah Rowe 22206cadeb bump flashprog to revision eb2c041 (14 Nov 2024)
This brings in several important bug fixes from upstream.

With this, the following upstream changes have been imported:

* eb2c041 cli_wp: Fix bail-out when multiple chips are detected
* e05e334 cli_common: Rename local `optarg' variable
* efad610 manibuilder: Include NetBSD (anita tags) in `native' target
* 09289fb manibuilder: Replace unmaintained DEFAULT_TAGS list
* 1457cc6 manibuilder: Stop build testing oldest, EOL targets
* 1faffa5 manibuilder: Fix Ubuntu Noble Numbat (24.04) for amd64
* 61dbe36 udev rules: Use `uaccess' tag instead of `plugdev' group
* 63d30a2 install: Install binary into bin/, not sbin/
* 6ce26a7 flashchips: add Winbond W25R512NW / W74M51NW
* 612519b ichspi: Add Intel Arrow Lake support
* d5a61ef ichspi: Add Intel Lunar Lake support
* 5e0d9b0 ichspi: Add Intel Meteor Lake SoC
* 0ef2eb8 ichspi: Add Intel Snow Ridge SoC
* 42daab1 ichspi: Properly add Emmitsburg PCH
* af26008 ich_descriptors_tool: Add missing options for EHL & C620
* 82fe123 ich_descriptors: Hard code number of masters for newer gens
* 157b818 ich_descriptors: Guard MCH strap handling by chipset version
* db878fb ich_descriptors: Drop chipset detection based on `freq_read`
* b3cc2c6 ich_descriptors: Unify pretty printing of PCH100+ masters
* 8e4151d chipset_enable: Remove hidden-spidev workaround for Elkhart Lake
* 6d72efa chipset_enable: Remove hidden-spidev workaround for all 14nm PCHs
* 092a699 chipset_enable: Remove hidden-spidev workaround for TGP+
* 5bbd324 chipset_enable: Add missing PCI ID for Intel PCH H410
* a088475 chipset_enable: Factor PCH100 hidden-spidev workaround out
* 5eb7a58 Drop 1s delay before automatic verification
* 7427569 libflashprog: Run programmer_shutdown() on failed setup
* 5a9d6ea chipset_enable: Fix memory leaks introduced with AMD SPI100
* e149fbe Only try to check erase opcodes for SPI25 chips
* 07ebc68 Avoid NULL deref in check_block_eraser()
* 2405310 chipset_enable: Mark Intel QM87 as DEP
* 9897063 flashchips: Allow volatile register writes for W25Q128.V
* c972aed flashchips: Configure WP for MX25L25635F/45G
* 8f7122c cli: Add new write-protect CLI
* eed122d layout: Implement flashprog_layout_get_region_range()
* 1f693db cli: Add new `config' CLI for status/config registers
* 85c2cf8 cli: Implement "command" option parser
* 24c0977 cli: Add print function for generic CLI options
* b82aadc cli: Move some declarations into `cli.h`
* a705043 cli: Add a new CLI wrapper
* d39c7d6 cli: Extract basic CLI init into cli_common
* df6ce9f cli: Extract log argument parsing into cli_common
* 0da839b cli: Extract layout argument processing
* d91822a cli: Extract layout argument parsing into cli_common
* e7899a9 cli: Move all long-option keys into cli.h
* 34e783a cli: Extract flash argument parsing into cli_common
* e68b08b cli_classic: Rewrite programmer argument parsing
* 6898f5b spi25_statusreg: Prefer volatile status register writes
* 55e7884 Introduce FLASHPROG_FLAG_NON_VOLATILE_WRSR
* fbba454 Install udev rules
* 768cfc4 flashchips: Add GigaDevice GD25LR512ME

Signed-off-by: Leah Rowe <leah@libreboot.org>
2025-01-07 00:12:45 +00:00

91 lines
3 KiB
Diff

From 9d7b97a0f08a3f0f62c389aee61e92377d82d645 Mon Sep 17 00:00:00 2001
From: consts <grudnevkv@gmail.com>
Date: Fri, 2 Mar 2018 07:03:37 +0000
Subject: [PATCH 1/1] Workaround for MX25 chips
TEST: In-system programming a ThinkPad X200 using a clip and
pico-serprog works now. It just doesn't without this hack.
Chip: MX25L6405D
Tested-by: Riku Viitanen <riku.viitanen@protonmail.com>
Change-Id: I43a306b67862b59c1dcd02729e189f3bf73f481b
---
cli_classic.c | 5 +++++
include/programmer.h | 1 +
spi.c | 11 ++++++++++-
3 files changed, 16 insertions(+), 1 deletion(-)
diff --git a/cli_classic.c b/cli_classic.c
index 26253dc..5a80394 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -68,6 +68,7 @@ static void cli_classic_usage(const char *name)
" -o | --output <logfile> log output to <logfile>\n"
" --flash-contents <ref-file> assume flash contents to be <ref-file>\n"
" -L | --list-supported print supported devices\n"
+ " -m | --workaround-mx keep flash busy before sending command\n"
#if CONFIG_PRINT_WIKI == 1
" -z | --list-supported-wiki print supported devices in wiki syntax\n"
#endif
@@ -231,6 +232,7 @@ int flashprog_classic_main(int argc, char *argv[])
{"version", 0, NULL, 'R'},
{"output", 1, NULL, 'o'},
{"progress", 0, NULL, OPTION_PROGRESS},
+ {"workaround-mx", 0, NULL, 'm'},
{NULL, 0, NULL, 0},
};
@@ -357,6 +359,9 @@ int flashprog_classic_main(int argc, char *argv[])
cli_classic_usage(argv[0]);
exit(0);
break;
+ case 'm': /* --workaround-mx */
+ workaround_mx = 1;
+ break;
case OPTION_PROGRESS:
show_progress = true;
break;
diff --git a/include/programmer.h b/include/programmer.h
index 11d15a8..3b33d5a 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -372,6 +372,7 @@ enum ich_chipset {
CHIPSET_LUNAR_LAKE,
CHIPSET_ARROW_LAKE,
};
+extern int workaround_mx; /* workaround for MX25* chips, makes flash operations more reliable, less failures */
/* ichspi.c */
#if CONFIG_INTERNAL == 1
diff --git a/spi.c b/spi.c
index 748ef99..9bbdee9 100644
--- a/spi.c
+++ b/spi.c
@@ -27,13 +27,22 @@
#include "spi_command.h"
#include "spi.h"
+int workaround_mx; /* Make operations with MX25* chips more reliable */
+
int spi_send_command(const struct flashctx *flash, unsigned int writecnt,
unsigned int readcnt, const unsigned char *writearr,
unsigned char *readarr)
{
- if (spi_current_io_mode(flash) != SINGLE_IO_1_1_1)
+ if (spi_current_io_mode(flash) != SINGLE_IO_1_1_1) {
return default_spi_send_command(flash, writecnt, readcnt, writearr, readarr);
+ } else if (workaround_mx) {
+ const unsigned char cmd[JEDEC_READ_OUTSIZE] = {JEDEC_READ, 0, 0, 0};
+ unsigned char buf[256];
+ /* keep flash busy for some time, keep CS warm before sending actual command */
+ flash->mst.spi->command(flash, sizeof(cmd), sizeof(buf), cmd, buf);
+ }
+ /* actual command */
return flash->mst.spi->command(flash, writecnt, readcnt, writearr,
readarr);
}
--
2.39.5